Low-Power Variation-Tolerant Design in Nanometer Silicon by Swarup Bhunia, Saibal Mukhopadhyay

By Swarup Bhunia, Saibal Mukhopadhyay

Layout concerns for low-power operations and robustness with admire to adaptations normally impose contradictory specifications. Low-power layout options reminiscent of voltage scaling, dual-threshold task and gate sizing may have huge damaging impression on parametric yield below approach diversifications. This publication makes a speciality of circuit/architectural layout strategies for attaining low energy operation less than parameter diversifications. We give some thought to either good judgment and reminiscence layout facets and canopy modeling and research, in addition to layout technique to accomplish at the same time low energy and edition tolerance, whereas minimizing layout overhead. This e-book will talk about present commercial practices and rising demanding situations at destiny expertise nodes.

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22b [53]. Here, an array of DUTs (D1 to Dn ) is biased in sub-threshold region by grounding their gate terminals. High threshold voltage thick oxide device switches (S1 to Sn ) are used to select each DUT individually. Let us consider the case where D1 is selected, by setting S1 = “1” and S2 to Sn = 0. The voltage at the intermediate node (Vs ) is then a function of the sub-threshold leakage current of D1 and the load device P1 . With the selection of a D2 , the sense node voltage changes depending on the mismatch between D1 and D2 .

These sensors need to ensure that the effect of any global process or environmental variation is cancelled out. This is usually accomplished by using a differential measurement approach. Local variation sensors can be broadly classified into two sub-categories based on the number of devices that are compared against each other. 1 Mismatch Sensors This type of process sensors detects the mismatch between two identical biased devices using a differential circuit configuration. The sensor is designed such that the output is strongly dependent on the mismatch between the DUTs.

This frequency can be measured externally using a high-precision oscilloscope. Typically, one of the stages of the oscillator is modified to introduce a clamp signal. When the clamp signal is asserted, oscillations are quenched and ring is clamped to a particular state at each of its nodes. This can be implemented by replacing one of the inverter stages in the ring with a Nand2 or Nor2 configuration. Fig. 23 Ring Oscillator Sensor consists of a chain of gates arranged in a ring. The output of several ring oscillators can be multiplexed and the frequency observed externally or detected onchip using a counter 1 Variations: Sources and Characterization 33 Frequency measurement is very attractive since it is independent of any additional delay stages that may be introduced between the output of the ring and the measurement point.

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