By Silvana Vallerga (auth.), Virginio Cantoni (eds.)
The following are the court cases of the 3rd overseas Workshop on conception held in Pavia, Italy, on September 27-30, 1993, below the auspices of 4 associations: the crowd of Cybernetic and Biophysics (GNCB)s of the nationwide study Council (CNR), the Italian organization for synthetic Intelligence (AI * IA), the Italian organization of Psychology (AlP), and the Italian bankruptcy of the overseas organization for development popularity (IAPR). The subject of this 3rd workshop was once: "Human and desktop imaginative and prescient: Analogies and Divergencies." a large spectrum of themes was once lined, starting from neurophysiology, to machine structure, to psychology, to picture figuring out, and so on. consequently the constitution of this workshop was once really diverse from these of the 1st held in Parma (1991), and Trieste (1992). This time the workshop was once composed of simply 8 modules, every one including invited lectures (dealing with imaginative and prescient in nature and machines, respectively) and a typical panel dialogue (including the 2 teachers and 3 invited panellists).
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Additional info for Human and Machine Vision: Analogies and Divergencies
The technology plays a prominent part and really efficient devices rely on VLSI one way or another, but it does not look like much helpful in that respect. The main originality is often in the way registers and links are organized; • communications between pixels or operators, depending on the model, are shown a key feature of image processing architectures.
Programming is based on the "data-flow graph" (DFG) formalism (see figure 7a). An image processing algorithm is described using a DFG where nodes represent elementary operations involved in the algorithm. Graph arcs represent communication links between physical processors. The DFG formalism is naturally wellsuited to data-flow structures and to low-level image processing where the two-dimensional image topology still prevails and where local computations are performed. It has been shown t0065 that the DFG formalism is an adapted formalism to program wavefront array architectures.
Homogeneous Machines. These machines are bound to the incoming of processors (see above) and they depend a lot on the growth of ASIC technology. Until recently they could not be made, both technically and economically. Nowadays, integrating the whole machine seems reachable thanks to hybrid or mosaic technologies or wafer scale integration. They feature a regular architecture, centered around a communication network like mesh array or multidimensional grid, pyramid, hypercube ... Each network shows a priori advantages in terms of privileged communications or robustness against contention.